Since the LT Spice is not the best digital analyzer nor ss-DC simulator and i don't want to trash my 'puter with random software then i trash my 'puter with random software ... yep!
... as i ytd found my 4-4 D-trigger (see fig.1) malfunctioned and was discarded and reinvented due "LT-Digital" ?bug? (see note.1) - anyways - the MSO-X-cell has the VBA extension - that is enough for most (not so CPU demanding) tasks - with quite powerful debugging capabilities and enough OOP capabilities enabled
note.1 -- i likely reached some specific-situation-range by node-wide-analyzing the signal progression - so there might be design-bug - but @ 1-st glance it should work and it does _s_i_m_u_l_a_t_e_ in Spice - also @ the time designed i considered this more reliable than the russian RSD-trigger 'TM2 ... donno
and in VBA-XL
although it does not seem to like the timesteps larger than 100ns -- may have to do with the specific DTL source for this Excel-simulator - ?greater timesteps won't hit the transition range properly?
//// i always wondered about the 3/10 7/10 treshold point of logic chips -- it seems to have to do with TTL physiology and with noise immunity - there might be more ...
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